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Friday, 30 December 2011

Field Effect Transistor

Intro of FET :

The field-effect transistor (FET) controls the current between two points but does so differently than the bipolar transistor.  The FET operates by the effects of an electric field on the flow of electrons through a single type of semiconductor material.  This is why the FET is sometimes called a unipolar transistor.  Also, unlike bipolar semiconductors that can be arranged in many configurations to provide diodes, transistors, photoelectric devices. temperature sensitive devices and so on, the field effect is usually only used to make transistors, although FETs are also available as special-purpose diodes, for use as constant current sources.
Current moves within the FET in a channel, from the source connection to the drain connection.  A gate terminal generates an electric field that controls the current . The channel is made of either N-type or P-type semiconductor material; an FET is specified as either an N-channel or P-channel device.  Majority carriers flow from source to drain.  In N-channel devices, electrons flow so the drain potential must be higher than that of the Source (VDS > O)- In P-channel devices, the flow of holes requires that VDS < 0. The polarity of the electric field that controls current in the channel is determined by the majority carriers of the channel, ordinarily positive for P-channel FETs and negative for N-channel FETS.
Variations of FET technology are based on different ways of generating the electric field.  In all of these, however, electrons at the gate are used only for their charge in order to create an electric field around the channel, and there is a minimal flow of electrons through the gate.  This leads to a very high de input resistance in devices that use FETs for their input circuitry.  There may be quite a bit of capacitance between the gate and the other FET terminals, however.  The input impedance may be quite low at RF.
The current through an FET only has to pass through a single type of semiconductor material.  There is very little resistance in the absence of an electric field (no bias voltage).  The drain-source resistance (rDS ON) is between a few hundred ohms to less than an ohm.  The output impedance of devices made with FETs is generally quite low.  If a gate bias voltage is added to operate the transistor near cut off, the circuit output impedance may be much higher.
FET devices are constructed on a substrate of doped semiconductor material.  The channel is formed within the substrate and has the opposite polarity (a P-channel FET has N-type substrate).  Most FETS are constructed with silicon.  In order to achieve a higher gain-bandwidth product, other materials have been used. Gallium Arsenide (GaAs) has electron mobility and drift velocities that are far higher than the standard doped silicon, Amplifiers designed with GaAs FET devices have much higher frequency response and lower noise factor at VHF and UHF than those made with standard FETS.

JFET:
                


JFET
 
There are two basic types of FET.  In the junction FET (JFET), the gate material is made of the opposite polarity semiconductor to the channel material (for a P-channel FET the gate is made of N-type semiconductor material).  The gate-channel junction is similar to a diode's PN junction. As with the diode, current is high if the junction is forward biased and is extremely small when the junction is reverse biased.  The latter case is the way that JFETs are used, since any current in the gate is undesirable.  The magnitude of the reverse bias at the junction is proportional to the size of the electric field that 11 pinches" the channel.  Thus, the current in the channel is reduced for higher reverse gate bias voltage.
Because the gate-channel junction in a JFET is similar to a bipolar junction diode, this junction must never be forward biased, otherwise large currents will pass through the gate and into the channel.  For an N-channel JFET, the gate must always be at a lower potential than the source (Vcs < 0).  The channel is as fully open as it can get when the gate and source voltages are equal (VGS = 0).  The prohibited condition is when
VGS >0. For P-channel JFETs these conditions are reversed (in normal operation VGS 0 and the prohibited condition is when VGS < 0).
MOSFET :

Enhancement Mode
Enhancement Mode


Depletion Mode
Depletion Mode
 Placing an insulating layer between the gate and the channel allows for a wider range of control (gate) voltages and further decreases the gate current (and thus increases the device input resistance).  The insulator is typically made of an oxide (such as silicon dioxide, SiO2), This type of device is called a metal-oxide-semiconductor FET (MOSFET) or insulated-gate FET (IGFET).  The substrate is often connected to the source internally.  The insulated gate is on the opposite side of the channel from the substrate (see Fig ). The bias voltage on the gate terminal either attracts or repels the majority carriers of the substrate across the PN junction with the channel.  This narrows (depletes) or widens (enhances) the channel, respectively, as VGS changes polarity.  For N-channel MOSFETs, positive gate voltages with respect to the substrate and the source (VGS > 0) repel holes from the channel into the substrate, thereby widening the channel and decreasing channel resistance.  Conversely, VGS < 0 causes holes to be attracted from the substrate, narrowing the channel and increasing the channel resistance.  Once again, the polarities discussed in this example are reversed for P-channel devices. The common abbreviation for an N-channel MOSFET is NMOS, and for a P-channel MOSFET, PMOS.
Because of the insulating layer next to the gate, input resistance of a MOSFET is usually greater than 1012 Ohms (a million megohms).  Since MOSFETs can both deplete the channel, like the JFET, and also enhance it, the construction of MOSFET devices differs based on the channel size in the resting state, VGS = 0. A depletion mode, device (also called a normally on MOSFET) has a channel in resting state that gets smaller as a reverse bias s applied, this device conducts current with no bias applied (see Fig ).  An enhancement mode device (also called a normally off MOSFET) is built without a channel and does not conduct current when VGS = 0; increasing forward bias forms a channel that conducts current (see Fig. ).
 
Transistor Biasing 
N-Channel MOSFET
Depletion Mode
N-Channel MOSFET
Enhancement Mode
N-Channel JFET
NPN BJT
(Bipolar Junction Transistor)
 PWM is the most Utilisable concept in driving motors
 
Power MOSFETs at Work in a Motor Controller using Pulse Width Modulation (PWM)
Driving Power MOSFETs (PWM) requires special very low impedance drivers capable of supplying > 1 AMP in ~ 20 ns, such as National's DS0026. This is because the ~ 500pf to 1000pf of gate capacitance must be charged or discharged rapidly in order to keep unwanted power dissipation to a minimum.


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